a simple CPU Design with some basic operations

V

vhdl_addicted

Hi,

I would like to design my own first simplest CPU with VHDL codes. I
studied parts of a CPU on some books as Accumulator, Registers,
Memory, Control Unit. I have some questions to get answered:

----I want to make a 16-bit simple CPU. I want to multiply 2 numbers
(result= 3x5) by calling them from memory in my CPU. I will calculate
the result in ALU (arightmetic logic unit) as I consider. Then I want
to see the result on the CLK pulse screen in Multisim. But can you
give me a hint how to start in my architecture? How can I call
accumulator, multiplication, ALU and memory in my codes?

-how can i store 3 and 5 in my memory?
-what codes are used to call and multiply them in ALU?
-how can i carry my result to screen?

Thanks in advance,
 
V

vhdl_addicted

I would consider something like this:http://www.oxfordbromley.plus.com/files/miniCPU/arch.pdf

Google for examples.
Every text book has one.

       -- Mike Treseler




I needed a document about VHDL and cpu design with a good explanation.
I guess it will help me out. Thanks a lot for your help. The only
problem is how to design the datapath between Accumulator, control
unit, Arithmetic logic unit and so on... I dont know how to drop them
into VHDL codes. It might take time, but it will be worthy.
 
J

Jacko

I would consider something like this:http://www.oxfordbromley.plus.com/files/miniCPU/arch.pdf

Google for examples.
Every text book has one.

       -- Mike Treseler

Not a bad little design. It does worry me some as he wants to multiply
as his first operation. Doing the bus routing is a matter of case/when
assignments on various decoded signals from opcodes fields. Designing
the instruction set architecture is the hardest part. Making it too
complex leads to an un-simple CPU, making it too simple can lead to
dificult use or lack of turing completeness.

Working out which routing choices are best can be done after you have
designed the sub-units such as the ALU. You must decide how many
operations the ALU will have, as a trade off between size, speed and
logic utility per cycle (Computational Use Density).

cheers jacko

http://nibz.googlecode.com
 
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cpu designer

i suggest you use registers and some sort of control for the registers

this would be the simplest way to do it

you can email me if you have any question
 

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