Anyone encountered Modelsim Error 13

[Roman Zeilinger]

Hi

I am about to run my generated VHDL code with Modelsim but unfortunately
I got the following errors when I call Modelsim with my architecture:

# Loading ./work.testbench(behavior)
# Loading ./work.RISC32(behavior)
# ** Warning: (vsim-3473) Component 'arc_registerfile' is not bound.
# Time: 0 ns Iteration: 0 Region: /testbench/RISC32 File:
.../src/LTRISC32ca_gen.vhd
# ** Warning: (vsim-3473) Component 'arc_memoryfile' is not bound.
# Time: 0 ns Iteration: 0 Region: /testbench/RISC32 File:
.../src/LTRISC32ca_gen.vhd
# ** Warning: (vsim-3473) Component 'arc_pipe' is not bound.
# Time: 0 ns Iteration: 0 Region: /testbench/RISC32 File:
.../src/LTRISC32ca_gen.vhd
# Creating elaboration file msim
vsim -i -load_elab msim
# Loading elaboration data from file "msim"
** Warning: (vsim-3390) Unable to restore required memory (4291207168
bytes at 0x50a000).
Invalid argument. (errno = EINVAL)
** Fatal: vsim is exiting with code 13.
(Exit codes are defined in the ModelSim messages appendix
of the ModelSim User's Manual.)
make: *** [gui] Error 13

In the Modelsim Appendix it says:

Error 13: Problem during restore

Well this doesnt help me a lot to be honest. Anyone an idea what the
problem could be? I am using Modelsim 5.7d.

many thanks,
Roman

 

[HT-Lab]

Hi

I am about to run my generated VHDL code with Modelsim but unfortunately I
got the following errors when I call Modelsim with my architecture:

# Loading ./work.testbench(behavior)
# Loading ./work.RISC32(behavior)
# ** Warning: (vsim-3473) Component 'arc_registerfile' is not bound.
# Time: 0 ns Iteration: 0 Region: /testbench/RISC32 File:

You have missing components in your design! check that you have all the
source files and/or you modelsim.ini contains all your library mappings.

../src/LTRISC32ca_gen.vhd
# ** Warning: (vsim-3473) Component 'arc_memoryfile' is not bound.
# Time: 0 ns Iteration: 0 Region: /testbench/RISC32 File:
../src/LTRISC32ca_gen.vhd

More missing files?

# ** Warning: (vsim-3473) Component 'arc_pipe' is not bound.
# Time: 0 ns Iteration: 0 Region: /testbench/RISC32 File:
../src/LTRISC32ca_gen.vhd

agggh, back to the drawing board

# Creating elaboration file msim
vsim -i -load_elab msim

Why are you trying to load a pre-elaborated design after compiling your
files?

Hans
www.ht-lab.com

# Loading elaboration data from file "msim"
** Warning: (vsim-3390) Unable to restore required memory (4291207168
bytes at 0x50a000).
Invalid argument. (errno = EINVAL)
** Fatal: vsim is exiting with code 13.
(Exit codes are defined in the ModelSim messages appendix
of the ModelSim User's Manual.)
make: *** [gui] Error 13

In the Modelsim Appendix it says:

Error 13: Problem during restore

Well this doesnt help me a lot to be honest. Anyone an idea what the
problem could be? I am using Modelsim 5.7d.

many thanks,
Roman

 

[Roman Zeilinger]

Hi

Thanks for your answer, I corrected the mistakes. So no more warnings I
have got. However, when I try running modelsim I got the same error again:

vsim -i -load_elab msim
# Loading elaboration data from file "msim"
** Warning: (vsim-3390) Unable to restore required memory (4283256832
bytes at 0xf8b000).
Invalid argument. (errno = EINVAL)
** Fatal: vsim is exiting with code 13.
(Exit codes are defined in the ModelSim messages appendix
of the ModelSim User's Manual.)
make: *** [gui] Error 13

Is it possible that I am running out of memory here?

 

[Paul Uiterlinden]

Hi

Thanks for your answer, I corrected the mistakes. So no more warnings I
have got. However, when I try running modelsim I got the same error again:

vsim -i -load_elab msim
# Loading elaboration data from file "msim"
** Warning: (vsim-3390) Unable to restore required memory (4283256832
bytes at 0xf8b000).

Use the verror command for an explanation. Sometime it helps, sometimes not.

% verror 3390
vsim Message # 3390:
The result of the specified predefined attribute is outside
the range of the type of the prefix.
[DOC: IEEE Std 1076-1993 VHDL LRM - 14.1 Predefined attributes]

Invalid argument. (errno = EINVAL)
** Fatal: vsim is exiting with code 13.
(Exit codes are defined in the ModelSim messages appendix
of the ModelSim User's Manual.)

Indeed. RTFM:

exit code 13: Problem during restore

But you knew that already. ;-)

make: *** [gui] Error 13

Is it possible that I am running out of memory here?

I don't know. I have never used the -load_elab option. By the looks of it,
it is just as useless as the -restore option nowadays.

 

[Kim Enkovaara]

Hi

I am about to run my generated VHDL code with Modelsim but unfortunately
I got the following errors when I call Modelsim with my architecture:

....

vsim -i -load_elab msim
# Loading elaboration data from file "msim"
** Warning: (vsim-3390) Unable to restore required memory (4291207168
bytes at 0x50a000).
Invalid argument. (errno = EINVAL)
** Fatal: vsim is exiting with code 13.
(Exit codes are defined in the ModelSim messages appendix
of the ModelSim User's Manual.)
make: *** [gui] Error 13

Why are you using load_elab at all? It is only useful for very
large netlist simulations (1+G of elaboration data), and even
there the benefits are not huge. The option is quite fragile,
and must be used carefully. For example load_elab database is
not cross platform like the normal simulation database.

In the Modelsim Appendix it says:

Error 13: Problem during restore

Well this doesnt help me a lot to be honest. Anyone an idea what the
problem could be? I am using Modelsim 5.7d.

At least you could try later version of Modelsim from the same series.
If I remember correctly 5.7 series was quite long and went to the f..h
region of letters. It might be hard to get support even from Mentor
because the simulator is very old (4+ years old).

--Kim

 

[HT-Lab]

Hi

Thanks for your answer, I corrected the mistakes. So no more warnings I
have got. However, when I try running modelsim I got the same error again:

vsim -i -load_elab msim
# Loading elaboration data from file "msim"
** Warning: (vsim-3390) Unable to restore required memory (4283256832
bytes at 0xf8b000).
Invalid argument. (errno = EINVAL)
** Fatal: vsim is exiting with code 13.
(Exit codes are defined in the ModelSim messages appendix
of the ModelSim User's Manual.)
make: *** [gui] Error 13

Is it possible that I am running out of memory here?

You are still trying to use a pre-elaborated design. This feature is only
useful if your elaboration stage takes ages and you have to do a regression
test. This might be the case with your processor but I would suggest you
compile the design first and then just load it in the simulator. Once that
is working for one of your testfiles than create a new elaboration file and
do your regression test. As suggested by Kim you might want to use a newer
version of Modelsim!

Hans
www.ht-lab.com