Array of array as in C ? how in vhdl!

[tech2007]

I am doing manual conversions of C codes into VHDL, and I have this doubt, if in C code we have:
for (len = 0; len <= 15; len++) //BLOCK 1
count[len] = 0;
for (sym = 0; sym < codes;
sym++) //BLOCK 2
count[lens[sym]]++;

where count is array => count [16]
so how to write the statments in bold , in vhdl ?

Please help, its very much urgent for me.

Thanks in advance