Hi All
i hope you can help me. I'm trying to build a BCD counter in VHDL and i've been refering to designs i've found on here and through google etc etc ...
but for some reason, my counter doesn't cascade properly?
basically ... its a 3 4 bit counter for units, tens and hundreds and when i try the design out, the output goes as follows .... 5, 6, 7, 8, 9, 0, 11, 12 ..... , 18, 19, 10, 21
can anyone help me? please find attached in a zip file the vhd files (4 bit counter, bcd top level and test benches)
thanks!
i hope you can help me. I'm trying to build a BCD counter in VHDL and i've been refering to designs i've found on here and through google etc etc ...
but for some reason, my counter doesn't cascade properly?
basically ... its a 3 4 bit counter for units, tens and hundreds and when i try the design out, the output goes as follows .... 5, 6, 7, 8, 9, 0, 11, 12 ..... , 18, 19, 10, 21
can anyone help me? please find attached in a zip file the vhd files (4 bit counter, bcd top level and test benches)
thanks!