i want to write the architecture of 3:8 decoder with enable ...
anyone can help ,
i wrote the entity
anyone can help ,
i wrote the entity
Code:
ENTITY Decoder3_8_Enable IS
port (a: in std_logic_vector(2 downto 0);
e: in std_logic ;
y:out std_logic_vector(7 downto 0));
END ENTITY Decoder3_8_Enable;