D
Dr. Giovanni Squillero
EvoHOT 2006
3rd European Workshop on Evolutionary Computation in Hardware
Optimisation
http://evonet.lri.fr//eurogp2006/?page=evohot
IEEE publishes an average of 20 papers each year where evolutionary
techniques are exploited to solve design automation problems.
Concurrently, the field of evolutionary computation shows a growing
significant interest in evolvable hardware and problems such as
routing, placement, or test pattern generation.
EvoHOT2006, the third EvoHOT workshop, will show the latest
developments in the field of evolutionary algorithms applied to design
automation, and will offer good opportunities for informal contact in a
friendly and relaxed setting.
Web address: http://www.evonet.info/eurogp2006
Topics include
* Analog circuit design
* Automatic test pattern generation
* Built-in self test
* Evolutionary design of electronic circuits
* Evolutionary hardware design methodologies
* Evolutionary robotics
* Evolvable hardware
* Floorplanning
* Hardware/Software co-design
* Hybrid evolutionary/exact approach
* Hardware accelerated methodologies
* Logic synthesis
* Routing
* Test program generation
3rd European Workshop on Evolutionary Computation in Hardware
Optimisation
http://evonet.lri.fr//eurogp2006/?page=evohot
IEEE publishes an average of 20 papers each year where evolutionary
techniques are exploited to solve design automation problems.
Concurrently, the field of evolutionary computation shows a growing
significant interest in evolvable hardware and problems such as
routing, placement, or test pattern generation.
EvoHOT2006, the third EvoHOT workshop, will show the latest
developments in the field of evolutionary algorithms applied to design
automation, and will offer good opportunities for informal contact in a
friendly and relaxed setting.
Web address: http://www.evonet.info/eurogp2006
Topics include
* Analog circuit design
* Automatic test pattern generation
* Built-in self test
* Evolutionary design of electronic circuits
* Evolutionary hardware design methodologies
* Evolutionary robotics
* Evolvable hardware
* Floorplanning
* Hardware/Software co-design
* Hybrid evolutionary/exact approach
* Hardware accelerated methodologies
* Logic synthesis
* Routing
* Test program generation