conditional compilation

[onkar.n.mahajan]

Hi All ,
I want to compile some part of the file depending on some
parameter set in the Makefile (using cc compiler ).

for instance

#ifdef CONDITION
//include this part of the code in compilation
#endif


I need to only set/unset the option in Makefile. Is it possible to do
this ?

One example will be of great help.

Thanks

 

[Rouben Rostamian]

I want to compile some part of the file depending on some
parameter set in the Makefile (using cc compiler ).
for instance
#ifdef CONDITION
//include this part of the code in compilation
#endif
I need to only set/unset the option in Makefile. Is it possible to do
this ?

In the Makefile set:

CFLAGS = -DCONDITION -whatever-other-flags

 

[Richard Tobin]

I want to compile some part of the file depending on some
parameter set in the Makefile (using cc compiler ).

for instance

#ifdef CONDITION
//include this part of the code in compilation
#endif


I need to only set/unset the option in Makefile. Is it possible to do
this ?

Most compilers accept a flag -Dname=value (or just -Dname if you don't
care what value it is). Something like

cc -DCONDITION -c myfile.c

You may wish to put all your compiler flags in a Make variable, instead
of repeating them on each cc line, e.g.

CFLAGS= -O -g -DCONDITION
...
cc $(CFLAGS) -c myfile.c

(Actually CFLAGS is a special variable name; if you don't specify a
rule for compiling C programs it will use $(CFLAGS) anyway.)

Different versions of the Make program vary somewhat; if you want
to do anything fancy you should probably find a group devoted to
the particular variety you're using.

-- Richard