Fatal Error Modelsim Ok Xilinx

[mreister]

I am running into a frustrating problem. I have a function that returns x"0000" as the default value and assigns its value to a signal. The files syntax is correct accourding to xilinx, but when i similate the file in modelsim i get a fatal error on the line where the assignment takes place. I have verified through modelsim that it is returning x"0000" so i suspect it has something types being used? Here is my code:


function get_current_data(channel_selection_data_par : in channel_selection_array;
channel_output_data_par : in channel_output_array;
adc_selected_par : in std_logic_vector(6 downto 0))
return std_logic_vector is
begin
-- first determine the current channel that needs to be selected
for i in 0 to 3 loop
if ( channel_selection_data_par(conv_integer(i),conv_integer(adc_selected_par)) = '1') then
-- the channel needed has been found. Now get the data
return channel_output_data_par(i,conv_integer(adc_selected_par));
end if;
end loop;
return x"0000";
end function get_current_data;

The assignment is:

signal output_reg_buffer : std_logic_vector (31 downto 0);
output_reg_buffer <= get_current_data(channel_selection_data,channel_output_data,adc_selected);

If anyone could help i would appreciete it.

 

[Steff]

Hy,

can you give me the type declarations of the both arrays:

channel_selection_array and
channel_output_array

thanx, Steff

 

[mreister]

type channel_output_array is array (0 to 3,integer range 0 to 6) of std_logic_vector ( 31 downto 0);
type channel_selection_array is array ( 0 to 3,integer range 0 to 6) of bit;

Here they are.

 

[Steff]

hy mreiser,

one more question:
Have you ever compiled this code or occures the fatal error at this time?
(Because your code has compile errors.)

Here a version of your function without compile errors:

library ieee;
  use ieee.numeric_std.unsigned;
  use ieee.numeric_std.to_integer;

function get_current_data(channel_selection_data_par : in channel_selection_array;
                          channel_output_data_par    : in channel_output_array;
                          adc_selected_par           : in std_logic_vector(6 downto 0))
return std_logic_vector is
  variable v_channel_output_data_par : std_logic_vector(31 downto 0);
begin
  
-- pragma translate_off
  -- set default
  v_channel_output_data_par := (others => 'X');
  
    if not(is_x(adc_selected_par)) then
-- pragma translate_on
      -- first determine the current channel that needs to be selected
      for i in 0 to 3 loop
        if (channel_selection_data_par(i, to_integer(unsigned(adc_selected_par))) = '1') then
          -- the channel needed has been found. Now get the data
          v_channel_output_data_par := channel_output_data_par(i, to_integer(unsigned(adc_selected_par)));
        else
          v_channel_output_data_par := (others => '0');
        end if;
      end loop;
-- pragma translate_off
    end if;
-- pragma translate_on
  
  -- set return value
  return v_channel_output_data_par;
  
end function get_current_data;

Note: In my opinion its better style having only one return statement.

Hope I could help you! ;o)

Steff

 

[mreister]

Thanks that worked great.

 

[Steff]

Your welcome!