Floating point synthesis

[newsgroup]

Hi,

I am using floating point package provided by 1076.3 working group (David
Bishop et. al.). For synthesis i am using Xilinx ISE. Of course, I am unable
to synthesize it my vhdl which uses floating point operators.
Can anyone tell me how to include the floating point library for synthesis
in Xilinx ISE.

Thanks,
Sunil

 

[David Bishop]

Hi,

I am using floating point package provided by 1076.3 working group (David
Bishop et. al.). For synthesis i am using Xilinx ISE. Of course, I am unable
to synthesize it my vhdl which uses floating point operators.
Can anyone tell me how to include the floating point library for synthesis
in Xilinx ISE.

The problem here is that XST can not deal with the negative index I use.
Xilinx has promised to fix this in the next major release.

If I were you, I'd use a copy of Synplicity.

 

[SKeffect]

The problem here is that XST can not deal with the negative index I use.
Xilinx has promised to fix this in the next major release.

If I were you, I'd use a copy of Synplicity.

Hi David,

Even with synplicity, is there any documentation which states how to
include the floating point library for synthesis.

Thanks,
Sunil

 

[David Bishop]

Hi David,

Even with synplicity, is there any documentation which states how to
include the floating point library for synthesis.

What I did was to create a synthesis test case. You can download it
from http://www.eda.org/vhdl-200x/vhdl-200x-ft/files.html

The file is "fphdl_synth.vhd". In this file I put everything from the
floating point package I though was synthesizable. I ran this through
several synthesis vendors.

 

[VA]

Hi David,

The link to your floating point synthesis test case is down. Can you please
post the testcase on the newsgroup or fix the link?

Thanks for your help.

Vinima

 

[VA]

Hi David,

Thank you for sending me the correct link.

Do you have a testcase that uses only the math real package?

Thanks,
Vinima

 

[David Bishop]

SKeffect wrote:

What I did was to create a synthesis test case. You can download it
from http://www.eda.org/vhdl-200x/vhdl-200x-ft/files.html

Should be:
http://www.eda.org/vhdl-200x/vhdl-200x-ft/packages/files.html

 

[Rick North]

Those who want to hear about the new FP package should check out MAPLD
in Washington DC in september. Where a presentation of the new types
and packages. Look at =>
http://klabs.org/mapld05/abstracts/189_lewis_a.html

/rn