Functions in VHDL

[sridar]

opeators in VHDL

Hai everyone,

is there package available in VHDL that supports + operator between std_logic data type operands.

 

[jeppe]

This will normally allow you to use the + operators in most cases:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

Your welcome
Jeppe