How to handle a real number in order to transport it to output in std_logic_vector

[thaosb]

Hi everyone!

I am a beginner in VHDL. Im trying to write a program for my study but I encounter a problem about type of data in VHDL.

In my application, I have to convert a digital value to analog (specificly, convert digital value of current to analog (ampere)).

In my program, I wite a function using VHDL to calculate the value of current. All calculations are concerned with REAL values. I want to use the return value of this function as the input of D to A converter. I know that the input of D to A converter must be an INTEGER. Therefore, the return value of my function should be STD_LOGIC_VECTOR or have the type suitable for D to A converter input.

I really don't know how to handle the REAL values in my function in order to make the return value suitable for the input of D to A converter without losing the accuracy of the result of calculations. If I fail in handle the type of data, I can not get the correct conversion with D to A converter.

Can anybody tell me the method to deal wiht my problem?

Please help me.

Thank you very much.