how to make a simple "gateway"?

[Attila Csosz]

Hi,

How to make a simple "gateway" in vhdl?

It has two port ( d and q ). When d receives a new value it must transfer to
q. And when q receives a new values it must transfer to d. It should avoid
self triggering.

I tried this but this is maybe not a good solution. For example self
triggering..?

ENTITY comp IS
PORT (d : INOUT std_logic;
q : INOUT std_logic
);
END comp;

ARCHITECTURE arch OF comp IS
BEGIN

comp_process1: PROCESS (d)
BEGIN
q <= d;
END PROCESS;

comp_process2: PROCESS (q)
BEGIN
d <= q;
END PROCESS;

END arch;

Thanks
Attila

 

[Reiner Huober]

How to make a simple "gateway" in vhdl?

It has two port ( d and q ). When d receives a new value it must transfer to
q. And when q receives a new values it must transfer to d. It should avoid
self triggering.

Don't do this (unless you *really* know what you do).

But how about this (explicitely avoiding self triggering):

ENTITY comp IS
PORT (d : INOUT std_logic;
q : INOUT std_logic
);
END comp;


ARCHITECTURE arch OF comp IS
Signal d_triggered, q_triggered: boolean;
BEGIN


comp_process1: PROCESS (d)
BEGIN
if not d_triggered'event then
q <= d;
q_triggered<=not q_triggered;
end if;
END PROCESS;


comp_process2: PROCESS (q)
BEGIN
if not q_triggered'event then
d <= q;
d_triggerred<=not d_triggered;
end if;
END PROCESS;

Surveiller: PROCESS(d,q)
BEGIN
assert not d'event or not q'event severity failure;
END PROCESS;
END arch;

Hubble.

 

[Ralf Hildebrandt]

How to make a simple "gateway" in vhdl?

It has two port ( d and q ). When d receives a new value it must transfer to
q. And when q receives a new values it must transfer to d. It should avoid
self triggering.

Are you talking about a transfer gate?
Ben Cohen has presented an interesting solution a long time ago:
http://members.aol.com/vhdlcohen/vhdl/vhdlcode/switch1.vhd

One problem is a chain of transfer gates. Based on Ben Cohen's model I
have written a model with a slight improvement to make chains of
transfer gates possible:
<http://www.ralf-hildebrandt.de/publication/transfergate/transfergate.vhd>

Play with the constant chain_length defined in this model. You may use
this testbench:
<http://www.ralf-hildebrandt.de/publication/transfergate/tbench_transfergate.vhd>

Ralf