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Message: [QUOTE="Nick Keighley, post: 4237310"] making it independent of the clock speed I never claimed to be smart I was using an imaginary (but representative) machine. See MIX. My original post said "we're talking half a dozen instructions and a couple of memory accesses". In my world "half a dozen" is /about/ 6 or so. 5, 6, 7. It makes no odds. Because your number was out by a factor of a hundred or so. there's usually a straightforward relationship between them on risc processors. I thought some machines did actually do one instruction per cycle. the HLL isn't too important either. [/QUOTE]