In modelsim after compilation i can load the design and view the
waveform, whereas in nclaunch it involves compilation, elaboration and
simulation, can i combine this compilation and elaboration as in
modelsim or can i avoid this intermediate elaboration step which i
don't find any use of it.
Elaboration is an essential part in HDL. ModelSim does elaboration
when you fire the simulation. In NC-Sim, you can use a
script like the following:
ncvhdl -v93 -linedebug -messages design.vhd
ncelab -messages -access +rwc design:architecture_name
ncsim -gui -mess work_lib.design:architecture_name &
design.vhd is a file with the entity & architecture. If they are in separate
files, then
ncvhdl -v93 -linedebug -messages design_entity.vhd
ncvhdl -v93 -linedebug -messages architecture_name.vhd
ncelab -messages -access +rwc design_entity:architecture_name
ncsim -gui -mess work_lib.design:architecture_name &
I personally prefer scripts, which I also use in ModelSim because you generally
have more than one file to compile, and its easier to fire a script. I
generally do that from an emacs shell.
.... Yet another reason to use emacs..
----------------------------------------------------------------------------
Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
http://www.vhdlcohen.com/ (e-mail address removed)
Author of following textbooks:
* Using PSL/SUGAR with Verilog and VHDL
Guide to Property Specification Language for ABV, 2003 isbn 0-9705394-4-4
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
------------------------------------------------------------------------------
