hello
i am trying to implement fixed point architecture.my problem is iam using fixed point package that u all guys might be familiar with (the one made by David Bishop).
The fixed point VHDL packages can be downloaded at:
h**p://www.eda.org/vhdl-200x/vhdl-200x-ft/packages/files.html
any way my problem is it work great untill u have compiled and make simulation using modelsim.but when i want to synthesize the design its gives problem.and problem it gives is
ERROR:Xst:1866 - "C:/Dokumente und Einstellungen/mum/Desktop/fixed point alu/er/ALU_check/fixed_pack1.vhd" line 41: Expression has no value.
and line 41 is
constant fixedsynth_or_real : BOOLEAN; -- differed constant
this constant is used at another place in this way
constant fixedsynth_or_real : BOOLEAN := true;
did any one of u guys have any idea what actually the problem is and what i have to do to solve it.
iam using xilinx ise8.1.
waiting for reply.
i am trying to implement fixed point architecture.my problem is iam using fixed point package that u all guys might be familiar with (the one made by David Bishop).
The fixed point VHDL packages can be downloaded at:
h**p://www.eda.org/vhdl-200x/vhdl-200x-ft/packages/files.html
any way my problem is it work great untill u have compiled and make simulation using modelsim.but when i want to synthesize the design its gives problem.and problem it gives is
ERROR:Xst:1866 - "C:/Dokumente und Einstellungen/mum/Desktop/fixed point alu/er/ALU_check/fixed_pack1.vhd" line 41: Expression has no value.
and line 41 is
constant fixedsynth_or_real : BOOLEAN; -- differed constant
this constant is used at another place in this way
constant fixedsynth_or_real : BOOLEAN := true;
did any one of u guys have any idea what actually the problem is and what i have to do to solve it.
iam using xilinx ise8.1.
waiting for reply.