newbie : why doesn't my bit file start running after configuration?

[RadioXilinx]

I am new to FPGA and am using a Xilinx Virtix II 3000.
I created a simple loop using an ADC and a DAC and made the bitfile in Xilinx ISE. However when I load it, it does not run. I don't really know where to look for the problem.
Any ideas would be greatly appreciated!
Thanks

Jonathan

 

[Tim Hubberstey]

I am new to FPGA and am using a Xilinx Virtix II 3000.
I created a simple loop using an ADC and a DAC and made the bitfile in Xilinx ISE. However when I load it, it does not run. I don't really know where to look for the problem.
Any ideas would be greatly appreciated!

Ask on comp.arch.fpga. This question is completely off-topic for this
group.

 

[Benjamin Todd]

If the bit-file is written successfully to the device it's a case of
something wrong in the VHDL, or constraints:
have you written the ucf to define the pins, have you assigned a timing
constraint?
have you assigned a reset, a clock etc to the correct external pins?
most importantly, have you simulated it - i.e. do you know it should work?
Ben

I am new to FPGA and am using a Xilinx Virtix II 3000.
I created a simple loop using an ADC and a DAC and made the bitfile in

Xilinx ISE. However when I load it, it does not run. I don't really know
where to look for the problem.