F
Frank Buss
I've defined this signals:
signal accu : std_logic_vector(31 downto 0) := (others => '0');
signal data : integer range 0 to 255 := 0;
Within a process, which is triggered with like this:
if clk'event and clk = '0' then
I try to shift the accu (I'm trying to build a CPU) :
accu <= accu sll data;
But WebPACK ISE 8.1, with the service pack 3, says:
"sll can not have such operands in this context"
Even for this line it reports the same error:
accu <= accu sll 1;
How can I rotate the signal?
I have a similiar problem with my bit-test instruction:
z_flag <= accu(x_register);
This produces "Wrong index type for accu.", with the same definition for
x_register like for accu:
signal x_register : std_logic_vector(31 downto 0) := (others => '0');
signal accu : std_logic_vector(31 downto 0) := (others => '0');
signal data : integer range 0 to 255 := 0;
Within a process, which is triggered with like this:
if clk'event and clk = '0' then
I try to shift the accu (I'm trying to build a CPU) :
accu <= accu sll data;
But WebPACK ISE 8.1, with the service pack 3, says:
"sll can not have such operands in this context"
Even for this line it reports the same error:
accu <= accu sll 1;
How can I rotate the signal?
I have a similiar problem with my bit-test instruction:
z_flag <= accu(x_register);
This produces "Wrong index type for accu.", with the same definition for
x_register like for accu:
signal x_register : std_logic_vector(31 downto 0) := (others => '0');