I am using Synopsys Design Compiler to generate reports for my design. Now i have a question here.
My system clock is 20 Mhz, or 50 ns!
I want to know/calculate what is the max. frequency at which my digital circuit can operate ? How to do it ?
Is it given by the slack ? If not then what is this "slack" ?
Here is the last part when I run the command report_timing................
--------------------------------------------------------------------------
data required time 48.95
data arrival time -12.55
--------------------------------------------------------------------------
slack (MET) 36.40
My system clock is 20 Mhz, or 50 ns!
I want to know/calculate what is the max. frequency at which my digital circuit can operate ? How to do it ?
Is it given by the slack ? If not then what is this "slack" ?
Here is the last part when I run the command report_timing................
--------------------------------------------------------------------------
data required time 48.95
data arrival time -12.55
--------------------------------------------------------------------------
slack (MET) 36.40