Specify bit position in array of vectors

[Shannon]

Gosh, it didn't take long for me to need help again! I promise this
is my last question for awhile.

I have four books on VHDL and Google didn't help.

How do I specify a bit position in an array of std_logic_vectors?

TYPE arraytype IS ARRAY (0 TO 8) OF STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL foo : std_logic;
SIGNAL big_array : arraytype;

....


foo <= big_array(5,2); -- yes I know this is wrong. What is the
syntax to pick bit #2 of big_array(5)?

Thanks again!

Shannon

 

[weber]

Gosh, it didn't take long for me to need help again! I promise this
is my last question for awhile.

I have four books on VHDL and Google didn't help.

How do I specify a bit position in an array of std_logic_vectors?

TYPE arraytype IS ARRAY (0 TO 8) OF STD_LOGIC_VECTOR(7 DOWNTO 0);
SIGNAL foo : std_logic;
SIGNAL big_array : arraytype;

...

foo <= big_array(5,2); -- yes I know this is wrong. What is the
syntax to pick bit #2 of big_array(5)?

Thanks again!

Shannon

Isn't it big_array(5)(2) ?
Can't imagine another way!
Cheers
weber

 

[Shannon]

Isn't it big_array(5)(2) ?
Can't imagine another way!
Cheers
weber- Hide quoted text -

- Show quoted text -

Yep. That did it. (I imagined all kinds of ways! None of them
correct...hehehe)

Thanks,
Shannon