"Target of signal assignment is not a signal"

N

Nicolas Moreau

Hey everyone, I'm kinda a newbie in VHDL programming. And I don't know
what this error means in my case, here is what I have :

type tab_aud_samp is array (NATURAL range <>) of std_logic_vector(31
downto 0);


function clear_table(h : tab_aud_samp) return std_logic_vector is
variable aux : std_logic_vector (31 downto 0);
begin
aux := X"00000000";
for i in 0 to h'length-1 loop
h(i) <= aux;
end loop;
return aux;
end clear_table;


I didn't know how to clear this table in only one clock some other
way. And it tells me that when I do

h(i) <= aux;

"Target of signal assignment is not a signal"

Do you know what it means ? What I should do ?

Thanks a lot.
Nicolas
 
R

Ralf Hildebrandt

Nicolas said:
h(i) <= aux;

"Target of signal assignment is not a signal"

h(i) := aux;

Variables have the ":=" assign operator, signals have the "<=" Operator.

Ralf
 
T

Tim McBrayer

Nicolas Moreau said:
Hey everyone, I'm kinda a newbie in VHDL programming. And I don't know
what this error means in my case, here is what I have :

type tab_aud_samp is array (NATURAL range <>) of std_logic_vector(31
downto 0);


function clear_table(h : tab_aud_samp) return std_logic_vector is
variable aux : std_logic_vector (31 downto 0);
begin
aux := X"00000000";
for i in 0 to h'length-1 loop
h(i) <= aux;
end loop;
return aux;
end clear_table;

The function parameter is a constant, not a signal, inside the function. It
is passed by value, so you cannot use a signal assignment. You could
rewrite this as a procedure with h being an inout signal parameter, but the
simplest way to do this the following, instead of calling clear_table:

h <= (others => (others => '0'));

This will initialize each element of your 2-D array of std_logic to '0'.
Alternatively you could use:

h <= (others => X"00000000");

if you find the double-others use is confusing.
 
K

KJ

Hey everyone, I'm kinda a newbie in VHDL programming. And I don't know
what this error means in my case, here is what I have :

type tab_aud_samp is array (NATURAL range <>) of std_logic_vector(31
downto 0);

function clear_table(h : tab_aud_samp) return std_logic_vector is
variable aux : std_logic_vector (31 downto 0);
begin
aux := X"00000000";
for i in 0 to h'length-1 loop
h(i) <= aux;
end loop;
return aux;
end clear_table;

I didn't know how to clear this table in only one clock some other
way. And it tells me that when I do

h(i) <= aux;

"Target of signal assignment is not a signal"

Do you know what it means ? What I should do ?

Thanks a lot.
Nicolas

"Target of signal assignment is not a signal" means that you've got an
assignment (in your case "h(i) <= aux;") where the target of the
assignment (in your case "h(i)") is not a signal. Your function
defines 'h' to be of type 'tab_aud_samp' and is an input (all function
parameters are inputs).

If you really want to assign to 'h' then you'll have to make it a
procedure instead of a function. If 'h' is supposed to be an input,
then don't assign to it.

But I'm guessing that what you really wanted to do was
aux := h(i);
instead of
h(i) <= aux;

KJ

KJ
 
K

KJ

h(i) := aux;

Variables have the ":=" assign operator, signals have the "<=" Operator.

Ralf

Flip it around to "aux := h(i);" since 'h' is the function input and
'aux' is the local variable.

KJ
 
A

Andy

Hey everyone, I'm kinda a newbie in VHDL programming. And I don't know
what this error means in my case, here is what I have :

type tab_aud_samp is array (NATURAL range <>) of std_logic_vector(31
downto 0);

function clear_table(h : tab_aud_samp) return std_logic_vector is
variable aux : std_logic_vector (31 downto 0);
begin
aux := X"00000000";
for i in 0 to h'length-1 loop
h(i) <= aux;
end loop;
return aux;
end clear_table;

I didn't know how to clear this table in only one clock some other
way. And it tells me that when I do

h(i) <= aux;

"Target of signal assignment is not a signal"

Do you know what it means ? What I should do ?

Thanks a lot.
Nicolas

Parameters passed into functions are read only inside the function.
You need to either return a cleared copy of H or use a procedure with
H declared as inout.

Andy
 
N

Nicolas Moreau

In fact, h is an output of my big picture, the only thing I wanted to
do is put 0s everywhere in it on the reset and I thought it ws the
best way to do it. A function that would on one clock only put 0s in
every one of the 16 std_logic_vector. Every advice is welcome and
already thank you to everyone of you ! So maybe I need a procedure
( never did one, only functions, I'm gonna take a look at it ) but I
don't think it would be := Am I right ?

Nicolas
 
N

Nicolas Moreau

Tim, your thing apparently worked.
I have to admit I don't completely understand how it works. Does
others in some way mean "everything it can be" ?
Or do you have any link to give me so I can better understand how it
works ?
Thanks again.

Nicolas
 
N

Nicolas Matringe

Nicolas Moreau a écrit :
Tim, your thing apparently worked.
I have to admit I don't completely understand how it works. Does
others in some way mean "everything it can be" ?

Not exactly. It means "everything that has not been specified before".
One can write
vect <= (0 => '1', others => '0');
for example.

In your case you have an array of arrays so you end up with "cascaded"
others.

Nicolas (another one)
 
A

Andy

Nicolas Moreau a écrit :


Not exactly. It means "everything that has not been specified before".
One can write
vect <= (0 => '1', others => '0');
for example.

In your case you have an array of arrays so you end up with "cascaded"
others.

Nicolas (another one)

And, the result of "others" must be locally staticly determinable,
unless it is the only choice. Thus you cannot say, (i => '1', others
=> '0'), unless i is a constant declared locally, or declared in a
package (and not deferred in a package body). Also, you cannot use it
in a comparison of vectors, since the comparison is valid for vectors
of different length, and thus the compile cannot determine how long
others might be in such a case. In an assignment, the compiler knows
that the others expression must be the same length as the vector being
assigned.

I really wish they'd relax the locally static / only choice
requirement, since it really does not break any rules they don't break
elsewhere ("i" can be locally non-static if used by itself), and in
every other application of others, it is allowed to be the null set,
so duplication of indices need not be an issue.

Andy
 

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