Trying to count VCO within a time frame determined by FPGA CLOCK

[have_a_question_!]

Hello,

I have been trying to implement a counter that counts the VCO within a
certain time period. This time period is determined by the FPGA clock.

I have two files in a project. One of them (file A) contains a process
that counts the rising edge of the FPGA clock until a time period is
reached. When the process in file A starts counting, it sets a certain
flag to 'high'. When the time period is reached, then the flag is set
to low. This flag is an input to a component that counts the VCO at
every rising edge (file B). So, file B basically counts VCO rising
edges during the time period determined by file A. The output that I am
looking for is the result of counting VCO.

The output that I get is correct...most of the time. I get the correct
output %75 of the time. For the other %25 of the time, I get a very low
value as an output. I do not know the reason behind such behavior.

If you have had such a problem before, please help! I am basically
trying to debug this problem, but I do not know how to start!

Thank you.

 

[Mark McDougall]

If you have had such a problem before, please help! I am basically
trying to debug this problem, but I do not know how to start!

I suspect you'll need to post your code for anyone to help.

Regards,
Mark