URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATION ON FPGA.....

[tudormarchis]

URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATION ON
FPGA.....

please world help meeeee

 

[Nicolas Matringe]

tudormarchis a écrit :

URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATION ON
FPGA.....

please world help meeeee

How much are you ready to pay for it ?

Nicolas

 

[Dave Pollum]

URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATION ON
FPGA.....

please world help meeeee

Connect the ouput of an oscillator to a clock input of a FPGA. Inside
the FPGA create a counter. Connect the counter's outputs to pins of
the FPGA. If you don't understand this, then read books on digital
hardware design.
BTW, the first step in making this generator (or any other "thing")
is to decide _what_ the signal generator (or "thing") should do! Ask
your professor for the specs! sheesh!

-Dave Pollum