vector to integer

[sonaj]

How to...?

dac: out std_logic;

signal dac_count: std_logic_vector (5 downto 0);

if dac_count>24 then
dac<= dac_data(dac_count); ???????? Error!
dac_cs<='0';
else
dac<='0';
dac_cs<='1';
end if;

thx.

 

[jeppe]

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

....

dac: out std_logic;

signal dac_count: std_logic_vector (5 downto 0);

if dac_count>conv_std_logic_vector(24,6) then
dac<= dac_data(conv_integer(dac_count)); -- May be OK
dac_cs<='0';
else
dac<='0';
dac_cs<='1';
end if;

 

[sonaj]

FPGA Equations list (like cpld)

Not found abel style equations list FPGA project, only CPLD project.
Xilinx ISE 10.1
I am beginer, and that list helps very much for me.