VHDL-2005 package changes

[David Bishop]

In the next update to VHDL we are planning several changes and
additions to the standard packages.

For the current packages, std_logic_1164, numeric_std, and
numeric_bit we plan to include the "read" and "write"
procedures in the package. This will also be done for any
new packages of types introduced in this revision.
Note, read and write procedures for standard types (bit,
bit_vector, integer, ...) will still be located in std.textio.

Std_logic_textio has been donated to the IEEE. All the read
and write functions that are proposed for std_logic_1164 are
intended to be backward compatible with this std_logic_textio.
As a result, we will be including a blank std_logic_textio
so that references to std_logic_textio will not cause issues.

It also means that if you have defined your own read and write
procedures for the types in std_logic_1164, numeric_std, or
numeric_bit that you will need to comment these procedures out
in the packages in which you have defined them.

Is this an issue for you and if so how big? Are you willing
to trade the modifications to your packages in exchange for
what we feel is a better package architecture for the future?

Alternately would it be better to keep the read and write for
std_logic_1164, numeric_std, and numeric_bit in separate packages
such as std_logic_textio, numeric_std_textio, and numeric_bit_textio?
Our concern with this approach for printing is that you need
twice the number of packages for printing. Consider that we
are also introducing packages for fixed point and floating
point in this revision and that they would need to be done
in a manner consistent with numeric_std and std_logic_1164.


For details of the change proposal see:
http://www.eda.org/vhdl-200x/vhdl-200x-ft

For proposed revisions to the package (and to try them out) see:
http://www.eda.org/vhdl-200x/vhdl-200x-ft/packages/files.html
Note any debug help with the new packages would be appreciated.

 

[Mike Treseler]

It also means that if you have defined your own read and write
procedures for the types in std_logic_1164, numeric_std, or
numeric_bit that you will need to comment these procedures out
in the packages in which you have defined them.

Is this an issue for you and if so how big?

Not an issue. I use very little file io, and
when I do, I use the non-overloaded read/write.
Even if I had written my own read/write procedures,
it wouldn't be much trouble to rename them.

Are you willing
to trade the modifications to your packages in exchange for
what we feel is a better package architecture for the future?

Yes. As long as I can use numeric_std and the
base vhdl read/write at the same time.

Alternately would it be better to keep the read and write for
std_logic_1164, numeric_std, and numeric_bit in separate packages
such as std_logic_textio, numeric_std_textio, and numeric_bit_textio?
Our concern with this approach for printing is that you need
twice the number of packages for printing.

I think you got it right. Build in as much as you can.

Thanks to you and everyone working on new vhdl standards.

-- Mike Treseler

 

[Allan Herriman]

Std_logic_textio has been donated to the IEEE.

Does that mean they're going to own the copyright and not allow the
source to be distributed for free? That would be a bad thing.

Regards,
Allan

 

[David Bishop]

Does that mean they're going to own the copyright and not allow the
source to be distributed for free? That would be a bad thing.

One of the objectives of the vhdl-200x-ft group is to allow us
to freely distribute the source code for these packages. The fact
that the IEEE puts it's copyright on the code that I've worked on
has been a thorn in my side for years now.

Rest assured, we are working on this issue.

 

[Jim Lewis]

Allan,
I share that concern also. The previous problem
with IEEE was that the packages were a large part
of the standard. Since the pacakges are now
going to be part of 1076, we may be able to
overcome this issue.

On the other hand, while it would be nice to have
source, it is not necessary. What we really need
is good man page type documentation about each of
the functions in the packages.

Cheers,
Jim

Does that mean they're going to own the copyright and not allow the
source to be distributed for free? That would be a bad thing.

Regards,
Allan

--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training mailto:[email protected]
SynthWorks Design Inc. http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

 

[Allan Herriman]

Allan,
I share that concern also. The previous problem
with IEEE was that the packages were a large part
of the standard. Since the pacakges are now
going to be part of 1076, we may be able to
overcome this issue.

On the other hand, while it would be nice to have
source, it is not necessary. What we really need
is good man page type documentation about each of
the functions in the packages.

VHDL has separate package and package body. Users should really only
need the package.
For some of the existing IEEE packages though, you need the package
body just to work out what the functions actually do. Surely a little
comment in the package wouldn't be too hard?

Regards,
Allan

 

[Jim Lewis]

Allan,

VHDL has separate package and package body. Users should really only
need the package.
For some of the existing IEEE packages though, you need the package
body just to work out what the functions actually do. Surely a little
comment in the package wouldn't be too hard?

If I am going to write user documentation, I would rather
keep it separate and make it public domain - that way
IEEE can't claim it and keep it for themselves.

Regards,
Jim

--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training mailto:[email protected]
SynthWorks Design Inc. http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~