Hi everyone,
I am new to this forum and I am new to VHDL...I am in deep trouble and would kindly request your help...
I have been asked to develop a VHDL code for SPI for the MAX6675...I have written some codes but the main problem I am facing is how to generate the chip select signal (CS).
I need to maintain the CS signal high for 220 ms to allow for the temperature conversion and then it must go low for 16 clock cycles to read the converted data bits...I do not know how to do that...
Please help me out...
Thank you,
Tarek
I am new to this forum and I am new to VHDL...I am in deep trouble and would kindly request your help...
I have been asked to develop a VHDL code for SPI for the MAX6675...I have written some codes but the main problem I am facing is how to generate the chip select signal (CS).
I need to maintain the CS signal high for 220 ms to allow for the temperature conversion and then it must go low for 16 clock cycles to read the converted data bits...I do not know how to do that...
Please help me out...
Thank you,
Tarek