Nomen Nescio said:
....
That's kind of a tautology since mainframe is like Kleenex or Jeep.
There is really only one...
So, you mean ... Crays? Oh, I see ...
It seems our resident IBM pundit offered us another "IBM [still] rules the
world" proclamation from some dystopian reality ... I wouldn't classify
IBM's mainframes as an iconic brand. As history has shown, no one wanted
IBM making their PCs either ...
In reality - which you apparently haven't been exposed to since they
locked you in a room in early 1960's - there are lots of mainframes,
minicomputers, supercomputers, e.g., Cray, Stratus, Tandems, VAX, ...
Wikipedia refers to "IBM and the Seven Dwarfs", so there are another seven
.... etc.
http://en.wikipedia.org/wiki/Mainframe_computer
BTW... After they let you out of that room, did you still see the color of
the walls? How many years did it take for the color burn-in to fade? Do
you find it harsh on the eyes to read non-orange or non-green text? Are you
converting everything in your house to pixie tubes for the flicker or vacuum
tube glow? How many boxes of programming manuals and photo-copied terminal
manuals do you have at home? Do you plan on using them for kindling? They
aren't on acid free paper you know ... ;-) Well, you can recycle the jokes
on your buddies at the next poker night, sporting event, or camping trip,
etc.
For you they might not be problems since Intel is what you know
I know gp x86 and knew 6502. Although I've not programmed them in
assembly, I've been exposed to Z80, 68000, DEC VAX, PA-RISC,
Transputer, etc.
[...] but when we
(IBM guys) look at Intel we ask stuff like
Do you really need to code a loop to move a string
of characters or compare character strings longer
than 4 or 8 or 16 bytes???
That's not necessary with x86, but that is a fast way and the slowest way.
There are three ways you can do that on x86: string instructions with a
repeat prefix (fastest or slowest depending), loop using the loop
instruction (slow), or loop using a conditional branch (fast).
[...] we haven't ever had to do that for strings less than 256 bytes
and for 25 years or more not for strings of any length.
The original 8086 (1978) had the string instruction
with repeat prefix.
To us that looks stupid.
Ok.
Do you really have only 8 "general purpose registers" and
need 2 or 3 of those to reference the stack?
The 64-bit instruction set has more registers. The 16-bit and 32-bit
instruction set has 8 GP registers. You need one to reference a stack, if
you use a stack. You need another one if you're using a certain style of
creating the linked-list for stack frames. If you're using more than 2 or
3, you're doing something wrong anyway. The instructions are well
distributed as to minimize need of them.
We had 16 true honest to goodness gprs since
the first series of machines.
So?
If "we" don't need or use that many registers, why is it important that
you have more than "us"? ...
AMD fixed that with AMD64 but they didn't go
far enough considering they had a chance.
They provided more of them, but register shortage wasn't and still isn't an
issue with the Intel, IMO. It's only an issue with those from RISC
backgrounds, post 8-bit microprocessor backgrounds, or university professors
who continue to spread the myth of register starvation as if the problem
wasn't solved ...
Given Intel's lack of storage to storage instructions [...]
What do you mean by that?
For x86 (general purpose instructions), only one instruction is needed for
data moves from register-to-register, register-to-memory, stack-to-register,
or stack-to-memory (and vice-versa). It's only memory-to-memory or
stack-to-stack that requires multiple instructions on x86. Seriously, how
often do you do the latter on your precious IBMs?
Given Intel's lack of storage to storage instructions
we have in IBM you really need more registers to
avoid playing hide and go seek on the stack all the time.
(I'll take it there is an implied "versus what" between
"instructions ... we have".)
You don't understand CISC do you?
http://en.wikipedia.org/wiki/Complex_instruction_set_computing
Didn't you ever code on an 8-bit microprocessor a non-orthogonal instruction
set? I.e., in the pre-RISC and define all non-RISC as CISC era ...
CISC instruction sets aren't orthogonal. This increases code density. They
are also optimized to minimize register need.
It seems you also don't understand what a register reorder buffer (ROB) is
either, apparently. A ROB allows renaming of a small number of registers
onto a larger set. So, the P6 mapped those 8 registers to 96. The actual
dependencies of register use between instructions is limited. So, having
only a few named registers, isn't really much of an issue.
Do you really have no register saving convention on Intel?
There is MS' cdecl, which is fairly standard for non-GNU, non-FOSS software.
But, other compilers define their own also, e.g., GNU compilers use a
different combination. OpenWatcom's C compiler can produce quite a few
combinations, including register only. (Why am I hearing mental projections
of "... but the x86 is register starved ... "?)
http://en.wikipedia.org/wiki/X86_calling_conventions
There are also standardized object formats, e.g., TIS and OMF:
http://en.wikipedia.org/wiki/Relocatable_Object_Module_Format
http://en.wikipedia.org/wiki/Executable_and_Linkable_Format
Every OS and individual function defines what has to be on
the stack and what registers have to be changed? We've had
standard linkage for almost the whole history of the machine
and OS and the implementations on Intel look
broken. ....
The "other" Rod Pemberton
Ok, could you please stop that? I asked you before.
From using Google and Yahoo, I know what a few "other" Rod Pemberton's do
for a living. One is a golfer. One is a banker. etc. It'd be quite rare
if another was a programmer. Of the more common names that begin with "Rod"
whose last name is Pemberton, there are supposedly these people living in
the US:
4 Rod
2 Roderick
7 Rodgers
1 Rodman
Rod Pemberton