C
Chris M. Thomasson
James Kanze said:You must know something I don't: the documentation of the Sparc
architecture definitely says that it isn't guaranteed;
Here is my initial question when I was joining up with the Sun CoolThreads
Contest:
https://coolthreads.dev.java.net/servlets/ProjectForumMessageView?forumID=1797&messageID=11068
Here is response I got form the Sun Engineering department:
https://coolthreads.dev.java.net/servlets/ProjectForumMessageView?messageID=11460&forumID=1797
BTW, SPARC can run in three memory coherency modes. TSO, PSO, RMO:
http://en.wikipedia.org/wiki/Memory_ordering
http://www.rdrop.com/users/paulmck/scalability/paper/ordering.2007.09.19a.pdf
(read all).
Heck, SPARC in RMO mode still handles data-dependant loads!
:^)
I've also heard that it fails on Itaniums,
AFAICT, `read_barrier_depends()' is a NOP on an Itanium. You have to consult
Linux source code.
and that it is uncertain on
80x86. (My own reading of the Intel documentation fails to turn
up a guarantee, but I've not seen everything.)
x86 is basically TSO. `read_barrier_depends()' is NOP on all Intel
architectures I have come across.