VHDL

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comp.lang.vhdl
A
random generator in hardware
  • ALuPin
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6
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2K
kennheinrich
K
S
Pulse stretching
  • Shannon
Replies
18
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15K
asicbaba
A
A
Last Call for Papers: 2007 International Conference on Modeling, Simulation and Visualization Metho
  • A. M. G. Solo
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0
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1K
A. M. G. Solo
A
J
State machine with control outputs
  • john
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15
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1K
KJ
K
D
urgently needed
  • dsp.comm
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4
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896
Ved
V
M
Project on Implementaion of PDA( personal digital assistant)
  • mohammednajeeb
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2
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747
weber
W
E
SONET deframer design ....
  • ekavirsrikanth
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1
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757
Mike Treseler
M
P
RFC: does this make any sense?
  • Paul Taylor
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10
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1K
Mike Treseler
M
M
Electrical gigabit transmission ?
  • Michael Weiss
2
Replies
22
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2K
Rob Warnock
R
A
Variable vs. Signal on indexing
  • ALuPin
2 3
Replies
50
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7K
Mike Treseler
M
S
Specify bit position in array of vectors
  • Shannon
Replies
2
Views
1K
Shannon
S
S
Wrong IDCODE
  • Simon
Replies
1
Views
811
weber
W
P
Quartus FFT IP output problem
  • patrick.melet
Replies
0
Views
897
patrick.melet
P
J
Xilinx Error
  • john
Replies
1
Views
992
Benjamin Todd
B
T
URGENT HELP!!! I NEED A PROJECT MADE IN VHDL FOR SIGNAL GENERATION ON FPGA.....
  • tudormarchis
Replies
2
Views
884
Dave Pollum
D
A
Including Verilog parameter file in VHDL design
  • ALuPin
Replies
1
Views
3K
Marcus Harnisch
M
M
Having trouble with my FIR filter, help much appreciated.
  • marlan.mcleish
Replies
5
Views
889
marlan.mcleish
M
N
Counter simulation proper but giving trouble in DFT
  • nisheethg
Replies
1
Views
757
nisheethg
N
N
Counter simulation proper but giving trouble in DFT
  • nisheethg
Replies
0
Views
736
nisheethg
N
S
Bidirectional bus and virtual pins
  • Shannon Gomes
Replies
18
Views
2K
Andy
A
N
Another Verilog to VHDL converter request
  • Nicolas Matringe
Replies
11
Views
5K
Nicolas Matringe
N
G
HCM / LCM signalling
  • Geronimo Stempovski
Replies
3
Views
1K
Jon Slaughter
J
A
verilog testbench fot vhdl ams
  • apurva
Replies
1
Views
2K
Ajeetha (www.noveldv.com)
A
M
referencing externally declared signals in a package
  • mmz28
Replies
1
Views
693
Mike Treseler
M
P
Quartus FFT IP problem
  • patrick.melet
Replies
0
Views
898
patrick.melet
P
J
simulator Error
  • john
Replies
4
Views
1K
SKeffect
S
K
[Q]: Is Digilent still in business ???
  • Kosta Xonis
Replies
3
Views
847
John_H
J
K
ABout Matrix transpose
  • kisna
Replies
1
Views
1K
Colin Paul Gloster
C
S
Keypad vhdl code stuff
  • sabir.waheed
Replies
1
Views
3K
Neo
N
B
Numeric variable type
  • Bibi69
Replies
2
Views
2K
Andy
A
H
(vhdl-mode) Current context
  • HS
Replies
1
Views
670
Mike Treseler
M
C
How to disable "_i" insertion on signals in emacs VHDL mode
  • chris.plachta
Replies
2
Views
1K
Mike Treseler
M
Z
converting ahdl to vhdl
  • zlotawy
Replies
1
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3K
Andy
A
V
sensitivity list
  • Volker
Replies
5
Views
1K
Paul Uiterlinden
P
W
video buffering scheme, nonsequential access (no spatial locality)
  • wallge
Replies
14
Views
1K
wallge
W
A
Xilinx floating-pt IP not working?
  • Anon Anon
Replies
10
Views
2K
Mike Treseler
M
J
VHDL-200x Fixed_pkg Problems
  • Jamin
Replies
7
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2K
Jamin
J
E
regarding arrays..........
  • ekavirsrikanth
Replies
6
Views
693
Nicolas Matringe
N
H
Custom indentation in Emacs Vhdl-mode
  • Hugo
Replies
15
Views
2K
Martin Thompson
M
S
Datapath design problem?
  • Shenli
Replies
2
Views
1K
Ray Andraka
R
A
Unconstrained array ports - Good or Bad?
  • Anon Anon
Replies
2
Views
1K
Anon Anon
A
A
32 bit floating point multiplier
  • anil
Replies
2
Views
3K
HT-Lab
H
A
how do you code this?
  • aravind
Replies
7
Views
1K
Andy
A
D
Problem with I/O files.
  • dziadek
Replies
0
Views
806
dziadek
D
Z
How to do the shift bit operation in Array
  • ZHIQUAN
Replies
12
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2K
ZHIQUAN
Z
R
synthesis equivalent statement/code/suggestions ?
  • Rama
Replies
2
Views
760
Rob Dekker
R
T
What FSM should I use ?
  • Thor Phersen
2
Replies
22
Views
4K
Jan Decaluwe
J
M
C-Systemc-VHDL problem in Modelsim
  • Mr. Peterfolk
Replies
3
Views
2K
Mr. Peterfolk
M
A
Call for Papers: WORLDCOMP'07: conferences in computer science & computer engineering, USA
  • A. M. G. Solo
Replies
0
Views
2K
A. M. G. Solo
A
W
Good hardware design code re-use strategies, reference book
  • wallge
Replies
5
Views
1K
Bill Mills
B

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